What is virtual memory, and how does paging work?
Virtual memory gives every process its own private address space that looks large and continuous, while the OS maps it onto real RAM in fixed-size blocks called pages (often 4 KB). A page table translates each virtual page to a physical frame, and pages not in RAM can be kept on disk and loaded on demand through a page fault.
Explain it simply
Think of a big hostel where every student is told, "Your things are in lockers 1 to 100." Every student hears the same numbers, but the warden keeps a register that says Priya's locker 1 is actually locker 734, and Aman's locker 1 is locker 82. Students never see the real numbers. Some rarely used bags are even stored in the basement, and the warden fetches them only when asked.
That is virtual memory. Each process uses virtual addresses that start at the same place and look continuous. The operating system, with help from the hardware, maps them to real physical addresses in RAM. Things not needed right now can live on disk.
Example
Say pages are 4 KB (4096 bytes) and a process reads virtual address 8200.
- Page number = 8200 / 4096 = 2 (integer division)
- Offset inside the page = 8200 mod 4096 = 8
The page table for this process says virtual page 2 is in physical frame 5. So the physical address is:
5 × 4096 + 8 = 20488
Page table (one per process)
Virtual page | Frame | Present?
0 | 9 | yes
1 | - | no (on disk)
2 | 5 | yesIf the program now touches page 1, the present bit is "no", so the CPU raises a page fault. The OS finds a free frame (or evicts some other page), reads page 1 from disk into it, updates the table and restarts the instruction. The program never notices, except that this access was slow.
How it works
- Pages and frames: virtual memory is cut into pages, physical RAM into frames of the same size. Any page can go into any free frame, so there is no external fragmentation. The cost is small internal fragmentation: the last page of a region may be partly empty.
- MMU: the Memory Management Unit, a part of the CPU, does the translation on every memory access.
- TLB: walking the page table for every access would be slow, so the CPU caches recent translations in a small fast cache called the Translation Lookaside Buffer. Most accesses hit the TLB.
- Demand paging: pages are loaded only when first used. A program of 500 MB may start with only a few MB actually in RAM.
- Page replacement: when RAM is full, the OS picks a victim page to write out (if it was modified) and reuse. Common algorithms are FIFO, LRU (least recently used) and Optimal, which is a theoretical benchmark only.
Real-world use
- Isolation: one process cannot read another's memory because its page table has no mapping to those frames. A bad pointer causes a segmentation fault instead of corrupting another app.
- Running more than fits: you can open more apps than your RAM can hold; inactive pages go to swap.
- Sharing: shared libraries like libc are loaded once and mapped into many processes.
- fork() with copy-on-write: parent and child share pages until one of them writes.
Common mistakes
- Saying virtual memory "is" the swap space on disk. Swap is only one part; the key idea is address translation.
- Mixing up paging and segmentation. Paging uses fixed-size blocks; segmentation uses variable-size logical parts like code, stack and heap.
- Thinking a page fault is an error. Most page faults are normal; only an access to an invalid address ends in a crash.
What to say in the interview
"Virtual memory gives each process its own address space, which the OS maps to physical memory. With paging, the virtual space is split into fixed-size pages and RAM into frames of the same size, and a per-process page table maps pages to frames. The MMU translates addresses on each access, and the TLB caches recent translations to keep it fast. If a page is not in RAM, a page fault occurs and the OS loads it from disk, evicting another page with a policy like LRU if needed. This gives isolation between processes, avoids external fragmentation and lets programs use more memory than is physically present."
Follow-up questions
- What is the TLB, and what happens on a TLB miss?
- Compare FIFO, LRU and Optimal page replacement. What is Belady's anomaly?
- What is the difference between paging and segmentation?
- Why do 64-bit systems use multi-level page tables?
Go deeper
Read these once the basics above feel easy.
Effective access time. If a memory access takes 100 ns and a TLB lookup is close to free, a TLB hit costs about 100 ns, while a miss with a single-level table needs one extra memory access for the page table, about 200 ns. With a 98% hit rate, the average is 0.98 × 100 + 0.02 × 200 = 102 ns. This is why the TLB matters so much.
Multi-level page tables. A 48-bit address space with 4 KB pages has 2^36 possible pages; a flat table for that would be enormous. x86-64 uses a four-level tree, so tables are created only for the parts of the address space a process actually uses.